Verification for design compliance with foundry electrostatic discharge (ESD) rules is a critical step in the design tape out process. The Calibre parasitic extraction tools help enable signal integrity-aware analysis of the entire HBM channel implemented on the 3.5D Silicon Interposers.
HYPERLYNX, which supports PSI analysis of SerDes and HBM (high bandwidth memory) channels implemented on Samsung’s 3.5D Silicon Interposer.Xpedition Package Designer, which Samsung evaluated for physical implementations of its 3.5D Silicon Interposer, is a first for a package design tool targeting Samsung’s MDI technology, and it enables early-stage PSI (power and signal integrity) analysis in connection with Siemens’ HYPERLYNX suite of tools.
This netlist delivers foundry qualified sign-off MDI heterogeneous 3.5D structures. The Xpedition Substrate Integrator software, which Samsung used to generate a top-level “golden” system netlist for 3D LVS verification with Calibre 3DSTACK software.The Siemens tools evaluated by Samsung for the foundry’s advanced packaging technology include: For customers, this optimization helps enable seamless integration across multiple dies through construction of the complete MDI package assembly. Per the company, Samsung has successfully evaluated Siemens’ digitally integrated High Density Advanced Packaging (HDAP) flow for the foundry’s MDI (multi-die-integration) packaging process. Siemens Digital Industries Software announced it has enabled several of its electronic design automation (EDA) product families for the latest versions of Samsung Foundry’s advanced processes, including Siemens’ solutions targeting advanced packaging, electrostatic discharge (ESD) rules, and integrated circuit (IC) design in the cloud.
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